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Logix5000 Controllers Execution Time and Memory Use Reference Manual

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Introduction 1Logix5000 Controllers Execution Time and Memory Use Reference Manual1756 ControlLogix, 1768 CompactLogix, 1769 CompactLogix, 20D PowerFlex 700S with DriveLogixSolid state equipment has operational characteristics differing from those of electromechanical equipment. Safety Guidelines for the Application, Installation and Maintenance of Solid State Controls (Publication SGI-1.1 available from your local Rockwell Automation sales office or online at http://www.ab.com/manuals/gi) describes some important differences between solid state equipment and hard-wired electromechanical devices. Because of this difference, and also because of the wide variety of uses for solid state equipment, all persons responsible for applying this equipment must satisfy themselves that each intended application of this equipment is acceptable.Allen-Bradley, CompactLogix, ControlLogix, DriveLogix, FlexLogix, PowerFlex, and RSLogix 5000 are trademarks of Rockwell Automation, Inc.Trademarks not belonging to Rockwell Automation are property of their respective companies.If you want a Microsoft Excel version of this manual, click the Attachments tab of this PDF.Important User InformationIn no event will Rockwell Automation, Inc. be responsible or liable for indirect or consequential damages resulting from the use or application of this equipment.The examples and diagrams in this manual are included solely for illustrative purposes. Because of the many variables and requirements associated with any particular installation, Rockwell Automation, Inc. cannot assume responsibility or liability for actual use based on the examples and diagrams.No patent liability is assumed by Rockwell Automation, Inc. with respect to use of information, circuits, equipment, or software described in this manual.Reproduction of the contents of this manual, in whole or in part, without written permission of Rockwell Automation, Inc. is prohibited.1756-RM087H-EN-E - Frebruary 2009Supersedes Publication 1756-RM087H-EN-E - February 2007Introduction 2ImportantThe memory use of a project is the same regardless of which Logix5000 controller you are using (CompactLogix, FlexLogix, etc). However the execution times vary based on controller type.Use these worksheets to estimate the memory use and execution time of your logic. Use this information to select among different programming options.When you download your project, the controller optimizes memory use, which could reduce your calculated memory use by as much as 10% from the values presented in this worksheet.The numbers in these worksheets are based on revision 17 of the controller firmware. Actual results may vary because of the configuration of your project and the revision of software and firmware that you are using.The 1756-L63 controller uses a cache mechanism to enhance the performance of instructions. Actual performance depends on how sequentially the data is laid out and how frequently it is accessed.Caching has a significant impact on the execution times of bit instructions (XIC, XIO, OTE, OTU, OTL). For example, an XIC instruction has a best case execution time of 0.05 µs, where the project takes full advantage of caching. The XIC instruction has a worst-case execution time of 0.4 µs, where the project uses minimal caching. The typical execution time of an XIC instruction is approximately 0.1 µs.About this manual1756-RM087H-EN-E - Frebruary 2009Supersedes Publication 1756-RM087H-EN-E - February 2007Examples 3Ladder InstructionsExampleData TypeMemory (bytes)Execution Time (µs)DescriptionADDDINT280.26ADD instructionSource ADINTSource BDINTDestinationDINT280.26TotalArray subscriptsExampleData TypeMemory (bytes)Execution Time (µs)DescriptionADDDINT280.26ADD instructionSource ADINT[DINT]840.69array subscriptSource BDINTDestinationDINT1120.95TotalExpressionsExampleData TypeMemory (bytes)Execution Time (µs)DescriptionCPT (tag_a + tag_b)801.66CPT instructionADD (+)DINT280.26ADD operator1081.92TotalHere are some examples for a 1756-L63 controller:Here is an example for a 1756-L63 controller:When an array uses a tag for one of its subsrcipts (e.g., Array_A[Tag_B]), additional memory and execution time is required, depending on the number of dimensions in the array. Memory use and execution time for an instruction increases for each parameter that references an array.If an instruction contains an expression (CMP, CPT, FAL, FSC), then add memory and time for each operator in the expression. For each operator, use the values for the corresponding instruction.1756-RM087H-EN-E - Frebruary 2009Supersedes Publication 1756-RM087H-EN-E - February 2007Examples 4Data conversionsExampleData TypeMemory (bytes)Execution Time (µs)DescriptionADDREAL441.53ADD instructionSource ADINT962.51DINT to REAL conversionSource BREALDestinationREAL1404.04TotalADDREAL441.53ADD instructionSource ADINT962.51DINT to REAL conversionSource BREALDestinationDINT923.62REAL to DINT conversion2327.66TotalADDDINT280.26ADD instructionSource AINT800.52INT to DINT conversionSource BINT800.52INT to DINT conversionDestinationINT722.35DINT to INT conversion2603.65TotalLogix5000 controllers typically compare or manipulate values as DINTs or REALs (optimal data type).If you use a data type that is not an optimal data type or if you mix data types, you must add memory and execution time for data conversion.If you use mix integers and REALs in an instruction, the controller converts the values to REALs and then back to the destination data type.1756-RM087H-EN-E - Frebruary 2009Supersedes Publication 1756-RM087H-EN-E - February 2007Examples 5 Function Block ElementsFunction Block Instructions - IREFs and OREFs -Wires - These times include only the time for the instruction. They do not include time for IREFs, OREFs, or wires.Use the same times regardless of whether the function block is in a function block diagram or structured text.Choose the time for the IREF or OREF based on the data type of its tag. Do not add any time for immediate values.Choose the time for a wire based on the data type at each end of the wire pin).Here is an example of a function block diagram for a 1756-L63 controller:Function block elements include the following:1.7 µs for the ADD instruction2.73 µs for the DINT-to-REAL wire (The Source A pin uses the REAL data type.)0.46 µs for the REAL IREF0.38 µs for the REAL-to-REAL wire (The Source B pin uses the REAL data type.)0.28 µs for the DINT IREF1756-RM087H-EN-E - Frebruary 2009Supersedes Publication 1756-RM087H-EN-E - February 2007

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